Job Title

A Semiconductor design company are looking for an experienced ASIC Verification Engineer to join their team, to work on a variety of cutting edge projects across various products in the Semiconductor space. Join our team as a Senior ASIC Verification Engineer and contribute to the success of cutting-edge ASIC projects at advanced technology nodes, reaching down to 3nm FinFET. Leverage your expertise in SystemVerilog, UVM, and scripting languages to drive prime verification activities and employ state-of-the-art methodologies and tools to validate designs. Work on verification activities for assigned blocks or entire chips, ensuring strict adherence to project timelines. Utilize your expertise in SystemVerilog, UVM, and scripting languages to develop robust verification environments. Test Case Development: ~ Document test environment associations and create comprehensive test cases to validate design functionality. Apply constrained random verification approaches to enhance test coverage. Provide direct support for lab bring-up, execute test cases, and troubleshoot as needed. Analysis: ~ Perform thorough code and functional coverage analysis to ensure comprehensive verification. Eight or more years of experience in ASIC verification with a proven track record of delivering successful projects. Proficient in Verilog, SystemVerilog, and other hardware description languages. Expertise in scripting languages. Extensive experience with OVM/UVM methodologies, showcasing a deep understanding of advanced verification techniques. Techniques Familiarity: ~ Familiarity with constrained random verification techniques, assertions, and functional coverage. By applying to this role you understand that we may collect your personal data and store and process it on our systems.