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Overview At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design and developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer specifications. The Sr Principal Analog IC Designer contributes to the design of long-reach SerDes. The Sr Principal Analog IC Designers responsibilities include but not limited to: Implement and simulate SerDes, AFE, and IO circuits Document the circuit implementation and simulation results Present circuit performances in internal design review meetings Characterize circuit performance and post-process lab data TheSr Principal Analog IC Designer may also conduct feasibility and architect major SERDES subsystems and provide technical leadership to junior designers. Position Requirements: Canadian Citizen or permanent resident Masters or PhD degree in electrical engineering with specialization in analog microelectronics Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (16Gb/s) and in technologies 16nm Excellent problem-solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment Must have a thorough understanding of jitter and signal equalization techniques Proficient design experience in some of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High-Speed Clock Distribution; ADCs and DACs; Bias and Bandgap; and Voltage Regulators Expertise in low-jitter PLL design is a strong asset Proficiency in using CAD tools for circuit simulation, layout, and post-layout verification Other non-requirements that would be assets for candidates: o Familiarity with custom IC layout o Familiarity with Cadence design and simulation tools o Lab test experience o Familiarity with scripting languages (python, skill, etc) o Working knowledge of a set of common SerDes standards (PCIe, Ethernet, etc) and their electrical requirements Cadence is an equal opportunity employer committed to hiring a diverse workforce. Exigences du Poste / Position Requirements (Franais) tre citoyen canadien ou rsident permanent Dtenir une maitrise ou un doctorat en gnie lectrique avec spcialisation en microlectronique analogique Avoir un minimum de 8 ans d'exprience dans la conception et le dveloppement de SERDES CMOS ou de circuits intgrs I/O haute vitesse (16 Gbps) dans des technologies 16nm Avoir dexcellentes comptences en rsolution de problmes, de bonnes capacits de communication et une aptitude travailler en quipe Doit avoir une comprhension dtaille du concept de jigue et des techniques d'galisation du signal Avoir de lexprience dans la conception de la plupart des blocs de circuits SERDES: TX, RX, srialiseur, dsrialiseur, interpolateur de phase, PLL, distribution dhorloge haute vitesse, ADC et DAC, circuits de polarisation et de rfrence de tension (Bandgap), et rgulateurs de tension Une expertise en conception de PLL est un atout majeur Matrise des outils CAD pour la simulation de circuits et la vrification post-layout Autres qualifications facultatives recherches : o Familiarit avec le dessin de masques o Exprience avec les outils de Cadence o Familiarit avec les tests de laboratoire o Familiarit avec les langages de script (python, SKILL, etc) o Connaissance pratique dun ensemble de normes SerDes courantes (PCIe, Ethernet, etc) et de leurs exigences sur le plan lectrique Cadence est un employeur qui souscrit lgalit des chances et qui sengage embaucher une main-doeuvre diversifie. Were doing work that matters. Help us solve what others cant. We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known. #J-18808-Ljbffr