Job Title

Enterprise SerDes Physical Implementation Program Manager - 13855 Join to apply for the Enterprise SerDes Physical Implementation Program Manager - 13855 role at Synopsys Inc. We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished engineering leader with a passion for developing nextgeneration high-speed interface IP and testchips. With over a decade of handson experience in digital or physical design, you bring a proven track record of technical excellence and successful project delivery, particularly in the advanced nodes (TSMC 16nm or below). Your expertise spans the full design cyclefrom RTL to GDSIIenabling you to anticipate challenges, drive technical solutions, and ensure project success. You thrive in collaborative, crossfunctional environments, bridging analog, frontend, CAD teams, and product groups to create bestinclass physical implementation flows and methodologies. Your deep understanding of digital architecture, timing, and physical signoff is complemented by advanced scripting and automation skills, ensuring efficiency and quality at every stage. You are comfortable leading initiatives, making timely, autonomous decisions, and adapting quickly to dynamic project demands. You communicate effectively at all levels, whether guiding peers, partnering with customers, or presenting to leadership. You possess an innate curiosity for technological innovation and a drive for continuous learning, staying at the forefront of industry advances in mixedsignal IP, highspeed SerDes, and process technologies. You are driven by impact, eager to mentor others, and committed to delivering solutions that power the worlds most advanced semiconductor products. What Youll Be Doing: Managing the physical implementation of high-speed interface IPs and testchips, ensuring successful delivery across advanced process nodes. Driving crossfunctional collaboration with analog, digital, CAD, and product teams to optimize flows and resolve design challenges. Leading initiatives to advance and standardize bestinclass physical implementation methodologies and flows for SerDes IPs. Overseeing development and application of timing constraints and architectures to meet stringent power, performance, and area goals. Providing handson technical guidance and mentorship to engineering teams, ensuring project milestones are met on schedule. Interfacing with customers and internal stakeholders to communicate project status, manage requirements, and address technical concerns. Contributing to continuous improvement of automation, CAD tools, and scripting to enhance efficiency and quality of deliverables. The Impact You Will Have: Enable ontime delivery of industryleading highspeed interface IP, powering the next generation of data centers, AI, and networking solutions. Advance the adoption of cuttingedge process technologies and lowpower design techniques, keeping Synopsys at the forefront of semiconductor innovation. Drive best practices in physical implementation, improving overall product quality, reliability, and performance. Mentor and elevate the skills of engineering teams, fostering a culture of technical excellence and growth. Enhance collaboration between crossfunctional teams, streamlining development cycles and accelerating timetomarket. Directly contribute to customer satisfaction and Synopsys reputation for delivering robust, scalable, and highperformance IP solutions. What Youll Need: 12+ years of digital or physical design experience, including recent project tapeouts as a technical driver or project lead. Deep knowledge of the full design cycle (RTL to GDSII) at the chip level, with experience in advanced FinFET nodes (TSMC 16nm or below). Strong engineering foundation in digital architecture, implementation flows, and physical/timing signoff. Expertise in developing timing constraints and design architectures to meet or exceed power, area, and performance targets. Proficiency in scripting and automation (Perl, Tcl, Python) and understanding of CAD automation methodologies. Solid understanding of analog/digital interface challenges and mixedsignal verification flows. Previous project leadership experience and ability to travel internationally as required. Who You Are: Strong communicator, able to articulate complex technical concepts to diverse audiences. Collaborative team player who thrives in crossfunctional, multicultural environments. Methodical, detailoriented, and driven by continuous improvement. Autonomous decisionmaker with excellent time management and organizational skills. Open to feedback, adaptable, and resilient in the face of project changes or challenges. Passionate about mentoring and developing others. The Team Youll Be A Part Of: Youll join the MixedSignal IP organization, a worldclass team of engineers dedicated to developing advanced highspeed SerDes and mixedsignal IP across leadingedge process nodes. The team is renowned for technical innovation, close collaboration, and a relentless pursuit of excellence in delivering industrydefining solutions for Synopsys global customers. Youll work alongside experts in analog, digital, CAD, and program management, all committed to pushing the boundaries of whats possible in silicon design. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and nonmonetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Seniority Level MidSenior level Employment Type Fulltime Job Function Design, Consulting, and Engineering Industries Semiconductor Manufacturing, Software Development, and Computer Hardware Manufacturing Referrals increase your chances of interviewing at Synopsys Inc by 2x. #J-18808-Ljbffr