Job Title

System Validation Engineer (Various Levels) Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the companys COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver endtoend scaleup, and scaleout connectivity. The companys custom connectivity solutions business complements its standardsbased portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Role Overview Astera Labs is seeking System Validation Engineers across multiple levels to lead postsilicon bringup and system validation for highperformance PCIe and CXL memory expansion products used in AI and cloud data centers. You will design and execute validation plans, automate datacentric test flows, drive rootcause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real world performance and interoperability. This role is based in our Vancouver office , which is a strategic growth hub for Astera Labs validation team. You''''ll have the opportunity to be a foundational member of this expanding site while collaborating closely with our core team in San Jose. This is a unique chance to help shape the team''''s culture, processes, and technical direction as we scale our validation capabilities to meet surging demand for AI infrastructure connectivity. What Success Looks Like New silicon and platforms brought up on schedule with reproducible validation results Automated test suites that reduce manual effort and provide clear pass/fail and performance metrics Rapid, databacked rootcause resolution of system issues and strong customer satisfaction during integration Key Responsibilities Create comprehensive validation plans for AI fabric switch products covering functionality, performance, reliability, and interoperability Contribute to compliance testing strategies and adapt consortium test cases for execution from x86 and ARM platforms Produce clear, datadriven validation reports and status updates for internal stakeholders and customers Lead silicon and platform bringup activities, verify boot and runtime behavior on x86 and ARM systems Ensure timely readiness for customer engagements and product launches Debug complex issues across PCIe, CXL, NVMe, Ethernet, firmware, and hardware layers using protocol analyzers, logic analyzers, and CPUbased tool suites Test Automation & Infrastructure Develop robust, repeatable automation for IC and board testing with emphasis on execution efficiency, data collection, analysis, and automated reporting Design experiments to rootcause unexpected behavior and report results and specification compliance in an automated fashion Customer & CrossFunctional Collaboration Collaborate directly with customers to capture system requirements, reproduce customer scenarios, and demonstrate product capabilities Drive crossfunctional rootcause analysis with silicon, firmware, hardware, and system teams and document findings and corrective actions Basic Qualifications Bachelor''''s degree in Electrical Engineering, Computer Engineering, or related field 212+ years of experience supporting or developing complex SoC or silicon products for server, storage, or networking domains (level dependent) Working understanding of x86 and ARM architectures and UEFI/Linux boot sequences Solid grasp of highspeed signaling principles Handson experience with highspeed protocols such as PCIe, CXL, NVMe, or Ethernet Proven experience in silicon and system bringup, validation, and debug in lab and customer environments Strong Python automation skills for bench control, test orchestration, data analysis, and reporting Experience with lab equipment including protocol analyzers, logic analyzers, incircuit debuggers, and CPUbased tool suites Strong prioritization, planning, and independent execution skills with a customerfocused mindset Preferred Qualifications Master''''s degree in Electrical Engineering, Computer Engineering, or related field Working knowledge of C or C++ for embedded firmware and device drivers Familiarity with PCIe compliance standards and experience adapting consortium tests for platform execution Advanced understanding of memory architectures, highspeed signaling, and system boot flows Track record of influencing crossfunctional teams and navigating complex matrixed organizations Entrepreneurial, cando attitude with ability to think and act with the customer in mind The base salary range for this role is $125,000 - $290,000 CAD depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and nonbinary people, veterans, parents, and individuals with disabilities. As set forth in Astera Labss Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law. #J-18808-Ljbffr