Job Title

Kardium Inc., 155-8518 Glenlyon Parkway, Burnaby, British Columbia, Canada Job Description Hybrid work arrangement located in Burnaby, BC. Responsibilities Assisting in FPGA design, including implementing and verifying modules. Supporting debugging efforts for FPGA-related issues, working closely with firmware and hardware teams. Writing and maintaining testbenches to validate FPGA functionality. Participating in code reviews, contributing to design improvements and optimization. Assisting in system integration by collaborating with software, hardware, and verification teams. Working with multi-FPGA systems, including interconnect design and verification. Documenting designs, test procedures, and debugging results to ensure knowledge retention and transfer. Qualifications Bachelors degree or higher in electrical engineering, computer engineering, or a related field. Minimum 5+ years of experience in FPGA development and verification. Experience with Vivado for FPGA design and Active-HDL for simulation and verification. Proficiency in VHDL (primary); Verilog/SystemVerilog an asset. Experience with static timing analysis and closure. Understanding of AXI (Lite/Full) memory-mapped register interfaces. Understanding of clock domain crossing (CDC) principles. Basic understanding of analog/mixed-signal design, high-speed digital design, and signal integrity concepts. Ability to read electrical schematics. Experience with debugging tools such as logic analyzers and oscilloscopes. Proficiency in TCL and Python scripting. Familiarity with Git-based version control and code review workflows. Strong problem-solving skills and attention to detail. Excellent verbal and written communication skills. Strong interpersonal skills with the ability to interface effectively across multiple disciplines and functions at various levels of the organization. Nice to Have Experience with medical device design and quality requirements Experience with Zynq FPGAs and SoCs. Experience with the Xilinx UltraScale+ family. Experience with linting tools such as Aldec ALINT. Experience with Aurora and high-speed serial links (GTH transceivers). Experience with multi-FPGA AXI interconnect design. Experience with Vivado IP Integrator and TCL-based block design. Experience with ADC/DAC SPI interfacing. Other Attributes An exceptional level of technical expertise Proficiency with test and measurement equipment A strong drive to succeed with a track record of being highly productive Excellent problem-solving skills and attention to detail Able to deal with changing priorities and requirements Able to execute tasks with minimal instruction and guidance Able to rapidly understand new concepts and acquire new skills Compensation and Benefits $94,000 $114,000 (CAD Annually) Base salary plus 5% Retirement Savings contribution and participation in Kardiums stock option plan. Comprehensive medical & dental coverage for all permanent employees effective as of Day 1, with no waiting period. Work-day flexibility additional 3 personal days per year. Support for overall well-being, including top-up for maternity leave & adoptions; professional membership support. Career progression and learning support. We encourage applications from all qualified candidates who represent the full diversity of all communities. #J-18808-Ljbffr