We are open to hiring in GTA (Greater Toronto Area) and Ottawa. We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are You possess a solid foundation in analog and mixed-signal circuit concepts, with hands-on experience using CAD tools for schematic entry and layout design. You approach challenges with a problemsolving mindset, leveraging your scripting abilities to automate workflows and enhance productivity. Your communication skills enable you to clearly document processes and share best practices, fostering a culture of knowledge exchange. Above all, you are motivated to make a tangible impact in the semiconductor industry. You seek opportunities to contribute to innovative projects, learn from experts, and grow your career in a supportive, technologydriven environment. If you are excited by the prospect of working on DDR and HBM memory IPs, and you enjoy taking initiative, youll find yourself at home in our team. What Youll Be Doing Simulating and analyzing the performance of analog and mixedsignal circuits for DDR and HBM memory PHY IP. Characterizing circuit timing and validating timing .lib data against design specifications to ensure accuracy and reliability. Collaborating with senior engineers across multiple disciplines to identify design flow bottlenecks and develop automation solutions. Documenting workflows, design guidelines, and best practices to promote effective team collaboration and knowledge sharing. Applying scripting languages (Python, TCL) to automate tasks and streamline design processes. The Impact You Will Have Enhancing the performance and reliability of industryleading DDR and HBM memory PHY IP products. Driving productivity improvements through workflow automation and innovative design solutions. Facilitating knowledge sharing and documentation to strengthen team collaboration and project success. Ensuring design compliance and accuracy through rigorous timing analysis and validation. Supporting the evolution of Synopsys'' analog/mixedsignal design capabilities and methodologies. What Youll Need BSc or MSc in Electrical Engineering, with relevant experience in analog/mixedsignal design. Handson experience with schematic entry and layout design CAD tools. Knowledge of timing liberty files and mixedsignal timing analysis. Proficiency in scripting languages such as Python and TCL, with an ability to automate and optimize workflows. Familiarity with AI prompt engineering and agentic AI concepts, integrating modern approaches into design processes. Who You Are Strong communicator, able to document and share technical information effectively. Collaborative team player, eager to learn from and contribute to a diverse group of engineers. Detailoriented and organized, with excellent time management skills. Proactive problem solver, comfortable tackling complex challenges in fastpaced environments. Innovative thinker, continually seeking ways to improve processes and drive technological advancement. The Team Youll Be A Part Of You will join a dynamic R&D team focused on analog and mixedsignal design for DDR and HBM memory PHY IP products. Our team brings together engineers from various backgrounds, fostering an environment of collaboration, innovation, and continuous learning. We are committed to developing highperformance products that set industry standards, and we value the contributions and growth of each team member. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and nonmonetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
Job Title
Analog Design, Engineer - 16712