Job Title

Location: Woodlands Role requires flexibility to support project schedules, including extended hours and shift work where operationally required. Job Description - Lead architectural design development for semiconductor wafer fabrication facilities including fab buildings, cleanroom production areas, subfab spaces, central utility buildings (CUP), gas buildings, chemical storage facilities, and administrative or support buildings. - Translate semiconductor manufacturing process requirements into architectural space planning, ensuring layouts support production efficiency, tool installation, maintenance access, and operational workflow. - Plan and develop architectural layouts for cleanroom environments including process bays, chase corridors, gowning areas, airlocks, material transfer areas, and equipment installation zones. - Ensure architectural design complies with cleanroom standards and contamination control requirements including ISO 14644 and relevant SEMI standards. - Coordinate closely with process engineering teams to ensure architectural design supports semiconductor process tool layouts and manufacturing operations. - Lead architectural coordination with multidisciplinary engineering teams including mechanical, electrical, process, and structural disciplines to ensure integrated facility design. - Manage architectural BIM model development and coordination using platforms such as Revit and Navisworks, ensuring accurate modeling and clashfree coordination across disciplines. - Participate in BIM coordination meetings and multidisciplinary design reviews to resolve technical interface issues. - Review and manage architectural deliverables including design drawings, technical specifications, and design reports throughout project phases. - Interface with clients, consultants, and design partners to review architectural concepts, technical solutions, and design development progress. - Participate in design workshops, value engineering sessions, and technical reviews to optimize facility performance and construction feasibility. - Manage architectural design changes and ensure proper implementation of client requirements and project scope adjustments. - Ensure compliance with local regulatory requirements including BCA regulations, SCDF fire safety codes, and relevant building standards. - Coordinate authority submissions and support approval processes with relevant government agencies. - Provide architectural technical support during construction including review of contractor shop drawings, material submissions, and architectural method statements. - Respond to design clarification requests (RFIs) and resolve architectural design issues encountered during construction. - Conduct site visits and inspections when required to ensure construction works align with design intent. - Ensure architectural deliverables meet project quality standards, technical specifications, and company design guidelines. - Support development and maintenance of internal architectural standards for semiconductor manufacturing facilities. - Any other adhoc duties as assigned. Requirements - Bachelors or Masters Degree in Architecture, Architectural Engineering, or Built Environment. - Minimum 1015 years of experience in architectural design for largescale industrial or hightech facilities. - Experience in semiconductor wafer fabrication facilities or cleanroomintensive environments is highly preferred. - Experience working on complex industrial projects such as semiconductor fabs, pharmaceutical facilities, data centers, or advanced manufacturing plants. - Cleanroom facility design and contamination control planning. - Semiconductor fab facility planning and layout development. - Strong leadership, stakeholder management and decisionmaking capability. - Proficiency in BIM coordination and engineering software tools. - Proficiency in Mandarin is required to liaise with Mandarinspeaking stakeholders, suppliers and project counterparts. - Willingness to work extended hours or shift arrangements where reasonably required to meet project delivery timelines. #J-18808-Ljbffr