Job Title

You will be a part of the Automotive and Industrial Solutions Group which is a global leader in the design, manufacturing and marketing of Microcontrollers (MCUs) and Embedded Processors in the Automotive, Consumer and Industrial markets.Job DescriptionShould have expertise in 14nm / 10nm / 7nm / 5nm process nodes and experience of more than 12 yearsMandatory to have tape-out experience as STA block owner/LeadThorough knowledge and understanding of static timing analysis conceptsShould have a strong understanding of Constraints and able to modify and build the constraints with collaboration of RTL and DFT teamWell versed with the Block level / SOC level timing closure (STA) methodologies, ECO generation and predictable convergenceShould have good exposure to high frequency multi voltage design convergenceFull exposure to all aspects of STA including: Timing, DRCs, Sanity Checks, Annotation issues, Multivoltage STA flow enablement, Noise, Crosstalk etcWell versed with Tcl/Perl scriptingWork closely with the block owners to achieve timing convergence through systematic fixes and minimal manual effortClose interaction with worldwide team members (IO timing etc)STA flow automation exposure will be an added advantageMinimum Qualification : Master/Bachelor's Degree in Electrical/Electronic EngineeringMaster/Bachelor's Degree in Electrical/Electronic EngineeringSelf-motivated and Good communication skill