Job Title

Job SummarySenior Lead Engineer EmulationNXP is seeking highly qualified candidates to join the team as an SoC Accelerated Verification Engineer Lead !In this role, you will be responsible for Accelerated Verification of NXP SOCs and Sub-Systems on emulation platforms. You will be engaged with the design, architecture, IP providers, FW/SW, Emulation Model developers and driver development teams to execute use case scenarios, stress scenarios, HW-FW/SW co-verification, boot and reset scenarios, security, trace and debug flows.Expectations include: Architectural Development of Complex Pre-Silicon Verification environments for Emulation platform. Rigorously executing Verification Plans to ensure Right First Time Success of our Products. Development of Subsystem/SoC Verification and Coverage plans. Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure ‘Zero Defect’ chips Demonstrate excellent Self–motivation, communication, strong problem solving and teamwork skills. Set aggressive goals and meet/beat the commitments. Challenge Status Quo. Flexible enough to work in a dynamic environment and multitask seamlessly. Ability to think differently, encouraging and influencing technological innovations in the team Ability to work well as part of a team both locally, and with remote or multi-site teamsKey SkillsSelf-starter with 8+ years of experience on SOC/Chip level/Cluster/Sub-System Emulation on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision Experience in microcontroller architecture, Cores ARM A/M series, Interconnect (NIC, FlexNoC), Cache Coherency, Protocols like AHB/AMBA, AXI, ACE, OCP, Memory (Flash, SRAM, LPDDR/DDR3/4, SD, eMMC) and memory controllers, offload accelerators, functional safety Experience in automotive protocols like LIN, CAN, Multimedia/Networking protocols like PCIe gen3, MIPI CSI2, GPU, Automotive Ethernet (TSN), USB, DSP, Image/RADAR processing would be an advantage Experience in Emulation build flows, tool flows and debugging Create and execute Test plans targeting Sub-systems and SoC level. Experience with System Verilog/UVM for IP/Subsystem and SOC development environment Experience with Emulation/FPGA environment build, Transactor integration and bring up. Execution experience on Emulation/FPGA models. System (hardware and software) debug skills Understanding of hardware and/or software verification techniques Assembly programming skills Experience in Palladium/Zebu/Veloce Platforms Scripting and Automation (Perl, TCL, Python) to continuously improve operational efficiencyJob Qualifications B.Tech / M.Tech plus 8 years’ experience in Semiconductor industry. In depth experience in Emulation and SoC architecture is required.