PD:Location: KochiExp 4 to 15 Yearso JD#1 : 4-6years Tapeout experience in block level PnR implementation including synthesis for medium to complex blockso Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree buildo Basic Timing understanding to independently analyze timing pathso Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantageo Basic equivalency check understanding. Good to have Conformal LEC experience.o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks· JD#2 : 6-10yearso Tapeout experience in full chip floorplan/full chip partitioning flow.o Experience in die-size estimation – spread sheet IP based and synthesis basedo Experience in IO/Bump planning & placement, custom analog/PG planning and route implementationo Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantageo Experience in RDL routingo Experience in interfacing with cross functional teams and block PnR teamso Good understanding of basic shell scripting, tool based TCL scripting to automate all custom activitieso Experience in version control systemso Experience in managing/mentoring small teams· JD#3 : 6 – 10 yearso Multiple tapeout experience in full chip PnR for lower node technologies. o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantageo Experience in ETM/QTM based full chip PnR including synthesis.o Full chip CTS methodology planning/implementation.o Experience in closure of complex block PnR implementationo Experience in low power design implementation, CLP checkso Experience in independently setting up equivalency check runs including full chipo Experience in interfacing with cross functional teams and block PnR teamso Good understanding of basic shell scripting, tool based TCL scripting to automate all custom activitieso Experience leading team of significant strength.o Experience in version control systemso Experience in managing/mentoring small teams
Job Title
Physical Design Engineer