Understand the spec requirements and convert into a micro architecture specification. Realize theRTLdesign usingVerilog/System Verilog. Works with verification teams in defining the test plan and reviews the test coverage. Does pre implementation design checks like lint,CDC, RDC , constraint validation. Works with physical design team in defining the design and timing constraints and driving implementation till timing closure. Interact with cross functional circuit teams for new product development Participate in Architecture level discussions to define the specifications. Post silicon validation support in bringing up parts.Requirements/Qualifications: Minimum 8 years of solidASIC logic/Digitaldesign expertise with bachelor’s degree or master’s degree Strong digital design fundamentals. Strong hands on expertise inHDLs like Verilog/System Verilog. Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check. Knowledge of High speed protocols is plus. Strong scripting abilities using Perl/Tcl/python is a plus Strong written and verbal communication skills. Able to break down technical concepts to a larger audience is desired.
Job Title
Principal Logic Design