Job Title

Job description: PHY Layout designExperienced analog/mixed-signal layout designer for high-speed PHYs layout design.It is mandatory that the candidate has in-depth understanding of analog and mixed-signal layout design as well as floor planning activity, matching constraints, ways to reduce capacitance for high-speed digital with hand-on layout design experience of PHY circuits. Specific areas of expertise/knowledge required:• Voltage & current references, LDO regulator, high-accuracy comparator and amplifier layout design• High speed custom digital layout like serializer, de-serializer, clock divider, TX/RX and synchronizer• Understanding of ways to reduce capacitance, clock routing, minimal skew between parallel signal, clocks layout• EM, IR, constraints due to ESD, shielding, matched paths, common centroidtechnique etc• Good understanding of electrical schematics and link between layout and resulting electrical performances and manufacturability.• Efficient work organization and ability to enable advanced cad tool feature for layout efficiency.• Autonomy, ability to find solutions, quality-oriented mindset.The following areas would be a significant Plus:· Skills in scripting and automation· Knowledge of common PHY protocols (DP, USB, Ethernet etc.)· Concept of Quality in layout design and IP deliveryExperience: 5-8 yrs of PHY Layout Design