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Job Summary-Scope of Responsibilities: STA staff engineer, the role would expect the candidate to have deployment of new features and or methodologies related to STA and ECO domain. Scope of the work would cover (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence with tools in STA and ECO domain (PrimeTime, Tempus, Tweaker, PrimeClosure to name a few).There would be challenges for timing convergence at both block and Top level on cutting edge technology on high performance designs would have to be resolved for ensuring successful design tapeouts on time with high quality. Basic Hands-on on Scripting is a must to have for candidate.Specific skills & knowledge:-• Bachelor or Master in Electronics Engineering and specialization in VLSI domain.• 8-10 years of hands-on experience in SoC and IP level objectives on low geometry nodes (5/14/16/28/40nm).• Experience in Synopsys Cadence tools, low geometry node issues, working with EDA team in reviewing & resolving blocking issues in project.• Proven experience in delivering timing closure methodology of mixed signal SoC with high speed PHYs, IOs, PMU IP etc. closing analog / digital interfaces timing & signal integrity issues.• Experience in customizing flows & methodology to meet low power & area objectives of SoC and leading team to execute on time. Ability to use scripting languages / automation of Physical Implementation methodology creation and deployment.• Should have proven experience in demonstrating strong technical leadership to deliver on commitment, anticipation of challenges, assertive communication and excellent team player.• Excellent communication skills with proven experience in international relationships.