Hi Tech Mahindra Hiring Memory Layout Engineers for Bangalore. Exp: 4-8yrs Work Location: Bangalore NP:0-30days JD: -Seeking a skilled VLSI Memory Layout Engineer with hands on experience in advanced node (=7nm) memory IP layout. -The ideal candidate will be responsible for the physical design and layout of custom SRAM, Register Files, ROM, and other memory structures, ensuring optimal area, power, and performance. -The role demands in depth knowledge of layout challenges in FinFET technologies, including process design rules, reliability, and manufacturability. If interested share cv to
Job Title
Layout Engineer