Job Title

We are seeking a highly skilled Verification Engineer to join our client's semiconductor team. The ideal candidate will have hands-on experience in Design Verification (DV) at both IP and SoC levels using SystemVerilog (SV) and UVM methodologies . You will play a critical role in verifying complex, high-speed interfaces and protocols used in modern chip designs. Key Responsibilities: Drive pre-silicon verification efforts for IP and SoC designs, focusing on functional correctness before hardware fabrication. Develop and execute comprehensive test plans , test benches , and test sequences to validate design functionality from early stages. Build and maintain UVM-based verification environments in SystemVerilog , ensuring modularity and reusability across multiple verification projects. Design and implement verification components for industry-standard bus protocols such as AXI , AHB , and APB , ensuring protocol compliance. Conduct pre-silicon functional verification of high-speed interfaces including PCIe , USB , and Ethernet , as well as emerging standards like UCIe . Collaborate closely with architecture and design teams to define verification strategies and ensure full functional coverage of RTL. Perform detailed debugging of test failures and root cause analysis in close coordination with RTL design engineers. Support CPU subsystem verification , particularly for RISC-V and related architectures, ensuring robust integration and operation in complex SoCs. Required Skills and Experience: Proficient in SystemVerilog and UVM-based verification methodology. Strong experience in IP and SoC-level verification. Deep understanding of AMBA protocols : AXI, AHB, APB. Hands-on experience with high-speed interfaces : PCIe, UCIe, USB, Ethernet. Solid knowledge of test planning , coverage-driven verification, and regression testing. Experience with CPU core verification , preferably RISC-V or similar processor architectures. Familiarity with verification tools: simulators (VCS/Questa), waveform viewers, and debug tools. Desirable: Exposure to scripting languages like Python, Perl, or TCL for automation. Experience with formal verification techniques is a plus. Knowledge of low-power verification and DFT-aware verification . Education: Bachelor's or Master's degree in Electrical Engineering , Computer Engineering , or a related field.