Job Title

Individual shall be working as RV/PDN Engineer to work on SoC level Dynamic & Static IR drop assessment & closure, grid robustness work with peak current demands of IPs. Responsibilities include: Experience 7+/3+ Years Role: Lead Physical Design/Sr Engineer Physical Design Key Responsiblities: Ability to collaborate and resolve Dynamic & Static IR issues Provide Feedback on power grid robustness to Floorplan/APR teams Good exposure to high frequency design convergence for PDN and descent exposure VCD flows, RH, RHSC, Vmin flows Evaluate and optimize voltage rail assignment, regulator requirements for SOC Modeling of the power delivery networks, including on-die power gating and in-rush current profiles. Modeling of the current profiles and peak current demands of various IPs. Working with the system, PMIC and silicon package team to model the voltage response of the power delivery network. Experience in leading block level & SoC level EMIR and PDN activities. Strong Expertise in assessment of power grid requirement, good understanding on package & board level requirement Understanding of electrical properties of on-die PDN, power gating, package and system power delivery. Strong Skills in problem solving, scripting, data analysis and experience with EDA tools. Teamwork / flexibility / ability to thrive in a dynamic environment are very important Experience in 22 FDX FDSOI/ FinFeT 5nm & below technologies.Academic Credentials Bachelors or Master's degree in Computer/Electronics/Electrical Engineering