Position Overview: In this role, you will be responsible for design, synthesis and verification of Digital IPs for cutting-edge SoC projects. You will work closely with SoC System and Architecture teams to create IP definitions that meet customer and application needs. This role requires a strong background in design methodologies, hands-on experience with industry-standard tools, and the ability to lead design efforts from planning through execution. Key Responsibilities: Define IP architecture, micro-architecture and register specification. Drive and participate in specification writeup. Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers. Implement a specification using RTL coding techniques and best practices. Drive Requirement spec implementation and traceability. Work with third party vendors to define customization requirements of third-party IPs (controller, PHY, etc.) Work with the physical design teams, reviewing and providing guidance in floor-planning, power analysis, synthesis and timing signoff. Help drive IP Roadmaps based on Industry trends and Customer requirements anticipating needs. Help develop and/or evaluate design methodologies and participate in improving existing ones. Collaborate with and provide guidance to the verification, post silicon and software teams for bring up and performance tuning Contribute to design strategy development, ensuring alignment with project goals and timelines. Provide technical guidance to junior engineers and contribute to their professional development. Qualifications/ Skills : Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field. 10-20 years of experience in designing and RTL coding using Verilog / System Verilog and verifying design and implementation. Experience in writing functional design doc and/or functional, datasheet specifications. Experience with External Debugger, low-power techniques and power-aware design practices. Experience with Clocking, Reset, Mode Controller, Boot, Security IPs. Experience with Functional Safety standards for Automotive (ISO26262 etc), design care abouts, DFMEA analysis of IPs will be a plus. Experience in using verification tools (VCS, Xcelium, Questa etc.), Lint/CDC/RDC tools (Spyglass, Questa CDC) will be a plus. Solid understanding of SoC architecture, including CPU, memory, Bus protocols/Interconnect and peripheral integration. Strong problem-solving skills with the ability to troubleshoot and resolve complex issues. Drive methodology development for scripting and automation of tasks using Python, Perl, Tcl etc. Demonstrated leadership ability in driving design efforts and collaborating across teams. Good communication skills and the ability to work effectively within a team environment. Why Join Us? Work on advanced SoC and IP projects that influence the future of technology. Collaborate with talented professionals in a dynamic and inclusive environment. Opportunities for growth and advancement within the company. Competitive compensation and benefits package. About Us: L&T Semiconductor Technologies is a leader in innovative semiconductor solutions, committed to pushing the boundaries of technology to create a smarter, more connected world. We are an equal-opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
Job Title
Principal/ Sr. Lead Engineer, Digital IP/RTL Design