RTL-FPGA EngineerLocation : HyderabadExperience : 1-2 yearsunderstanding of Vivado Flow and HW validation using Xilinx(AMD) FPGAs.· Strong understanding of FPGA flow using Vivado, Logic design, Digital design etc.. Expertise RTL Coding in Verilog / System Verilog or VHDL. Knowledge in Xilinx FPGA architecture· Good Knowledge in Tcl or Python scripting
Job Title
Field-Programmable Gate Arrays Engineer