Job Title

Job description (Staff/Senior Staff Engineer) Backend Integration Engineer- Working experience on 7nm and below Technologies. - Proficient in Physical Synthesis flow and PPA optimizations with emphasis on Timing and Low Power design. - Proficient in Equivalence Checks, Low power Checks. - Hands on experience in timing/SDC constraints generation and management and timing report analysis. - Co-work with RTL, DFT and PD engineers to meet PPA targets. - Hands on experience with Industry Standard tools Fusion Compiler, Genus, Conformal LEC, Formality, Innovus, Primetime etc. - Hands on experience with functional ECO flow and implementation. - Good understanding of UPF. - Familiar with DFT Architecture. - Driving new tool evaluation, methodology refinement for PPA optimization for complex subsystem. - Proficient in scripting languages TCL/Perl/Python script. - Able to work in a diverse team environment and with remote teams. - Should be sincere, dedicated, and willing to take up new challenges. - Self-starter and highly motivated. - Strong debugging, initiative and analysis/problem solving and presentations skills. - Interaction with all stake holders which includes weekly/daily status reporting, issue capture and resolution.- 6-12 years with MTech or BTech with Top/Block level synthesis, Timing closure (STA), Physical Design or related work experience.