Job Title

Job Title: Senior Verification Engineer Experience: 5+ YearsLocation: HyderabadNotice Period: Immediate to 30 daysJob DescriptionWe are looking for experienced Senior Verification Engineers to work on UVM-based verification of MIPI PHY and Controller IPs. The role involves developing and maintaining robust verification environments, debugging complex protocol and timing issues, and collaborating closely with emulation and post-silicon teams to ensure high-quality IP delivery.Key ResponsibilitiesDevelop and execute UVM-based verification environments for MIPI PHY/Controller IPsWork hands-on with MIPI VIP for protocol validationImplement CRV, functional and code coverage, assertions (SVA), scoreboards, and checkersDebug complex protocol-level and timing-related issuesCollaborate with emulation and post-silicon validation teamsAnalyze failures using industry-standard debug tools (Verdi/DVE)Must-Have SkillsStrong knowledge of MIPI standards (CSI-2 / DSI / D-PHY / C-PHY / A-PHY – any)Proficiency in SystemVerilog and UVMHands-on experience with coverage, SVA, and debugging methodologiesExcellent debugging, analytical, and communication skillsInterested Engineers, kindly share with me your updated profile to naveen.a@