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Job Title


FPGA Design Engineer


Company : People Prime Worldwide


Location : Bhavnagar, Gujarat


Created : 2025-12-19


Job Type : Full Time


Job Description

Job Title: FPGA Design EngineerLocation: Pan India Experience: 5–15 Years Employment Type: Permanent Notice Period: Immediate – 20 Days CTC: Up to 34 (Max)About the CompanyOur client is a leading technology-driven organization delivering cutting-edge solutions across semiconductor, telecom, and embedded systems domains. They work on next-generation hardware platforms, enabling innovation in high-speed, high-reliability FPGA-based designs. The company follows industry best practices, Agile methodologies, and provides opportunities to work on complex, real-world engineering challenges.Job DescriptionDesign, develop, and validate FPGA-based solutions for high-performance systemsWork on complete FPGA design flow including RTL coding, synthesis, place & route, and timing closureDevelop and review RTL using Verilog/SystemVerilogPerform RTL quality checks including Lint, CDC, and RDC analysisDefine and validate timing constraints and perform STADebug FPGA designs using inbuilt logic analyzers (ILA/SignalTap, etc.)Collaborate with cross-functional teams including validation, firmware, and system teamsReview design documents and support FPGA validation activitiesFollow Agile development methodologies and version control practicesMandatory Skills✔ Strong understanding of FPGA design flow ✔ Hands-on experience in RTL coding (Verilog/SystemVerilog) ✔ Knowledge of CDC, STA, timing constraints ✔ FPGA debug experience using inbuilt logic analyzers ✔ Solid logic design and high-speed design knowledge ✔ Working knowledge of FPGA device architecture & clock structures ✔ Experience with synthesis, Place & Route, and STA ✔ Familiarity with bus protocols: AXI / AHB / APB / AvMM ✔ Knowledge of slow-speed protocols: I2C, SPI, UART, MDIO ✔ Experience with FPGA tools – Lattice Radiant (Mandatory); Intel, Xilinx/AMD (Good to have) ✔ Basic scripting knowledge (Make, Perl, Shell, Python) ✔ Experience with Git and Agile methodologyGood to Have / Added Advantages➕ Exposure to Telecommunication domain (5G, Radio Subsystems, AMS, etc.) ➕ Knowledge of PCIe, Ethernet IPs ➕ Experience in error detection and correction techniques ➕ Basic understanding of Zynq design flow ➕ Experience working in Agile/Scrum teamsImportant Note (Please Read Before Applying)