#ProxeleraI We’re HiringSenior / Principal ASIC Design Verification Engineersfor Bangalore, Hyderabad and Delhi locations Proxelera is expanding itsDesign Verification DV team s and we’re looking for passionate,hands-on Verification Engineers to work on cutting-edge SoC and ASIC designs.Locations: Bangalore (Urban), Hyderabad, Delhi Work Mode: Full-time | On-site Open Positions Sr. Lead / Principal / Manager – ASIC (SoC & Large Subsystems )DV 8–15+ years | Bengaluru Senior / Principal DV Engineer – SoC / ASIC 10–15+ years | Bengaluru & Delhi Senior DV Engineer 6–8 years | Bengaluru & Delhi Low-Power SoC DV Engineer 5–10 years | Bengaluru SoC DV Engineer 5–10 years | Bengaluru IP DV Engineer 5–10 years | Bengaluru DV Engineer 5-8 years | HyderabadAbout Proxelera Proxelera is focused on making the chip development journey smoother and more predictable. Proxelera specializes inRTL, ASIC, and SoC Verification , helping semiconductor teams deliverfirst-time-right silicon . With deep expertise acrossIP, subsystem, and full-chip verification , we work on complex designs spanninglow-power SoCs, processors, interconnects, and high-performance accelerators . Our engineers leverageSystemVerilog, UVM, assertion-based verification, and coverage-driven methodologiesto ensure quality, scalability, and predictable tapeouts.If you’re open to exploring new opportunities, pleaseapply via the linkorshare your updated resumeatgirish.nidyamale@ , orDM me / call at +91 96329 00829 . I’d be happy to discuss how these roles align with your experience and career goals.Best regards, Girish Nidyamale Manager – Talent Acquisition +91 96329 00829 ✉️ girish.nidyamale@ Let’s connect on LinkedIn:
Job Title
Senior Design Verification Engineers