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Job Description: EMIR Engineer (Electromigration & IR Drop) – VLSIRole OverviewThe EMIR Engineer is responsible for analyzing and ensuring the reliability of integrated circuits by performing Electromigration (EM), IR Drop, and Power Integrity analysis during physical design and sign-off stages. The role involves working closely with physical design, power, and timing teams to validate power delivery networks, identify reliability risks, and propose design optimizations to meet sign-off requirements.Key Responsibilities- Perform EM/IR (Electromigration & IR Drop) analysis at various design stages (pre-route, post-route, ECO, sign-off). - Execute static and dynamic IR drop analysis using industry-standard EDA tools (e.g., Ansys RedHawk, Voltus, Totem). - Analyze power grid strength, identify weak areas, and recommend fixes such as metal width adjustments, via insertion, and power grid re-design. - Collaborate with Physical Design (PD) teams to implement optimizations related to routing, floorplanning, and power grid design. - Maintain Power Integrity (PI) throughout the design by validating current density, thermal profiles, and voltage drop. - Work with circuit design teams to understand current consumption patterns and switching activity. - Generate EMIR sign-off reports and document findings with actionable recommendations. - Run vector-based and vectorless power analysis using SAIF/VCD/FSDB activity files. - Support timing closure and ECO cycles with EM/IR-driven design constraints. - Ensure compliance with foundry guidelines, design rules, and reliability standards (TSMC, Samsung, Intel, etc.). - Investigate failures, perform root-cause analysis, and drive corrective actions across teams.Required Skills & Qualifications- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related fields. - Strong knowledge of VLSI physical design, power delivery network concepts, and sign-off methodologies. - Hands-on experience with EMIR tools such as: - Ansys RedHawk / RedHawk-SC - Cadence Voltus - Synopsys PrimePower / PrimeRail - Understanding of: - Power grid design and floorplanning - Current density & electromigration physics - IR drop mechanisms (static & dynamic) - Clock and power gating concepts - Advanced-node challenges (FinFET, GAAFET) - Familiarity with scripting languages like TCL, Python, Perl for automation. - Strong problem-solving and debugging skills. - Good communication and cross-team collaboration abilities.Preferred Qualifications- Experience range between 3 to 8 years. - Experience with advanced process nodes (5nm/3nm/2nm). - Knowledge of multi-domain power architectures (UPF/CPF). - Exposure to timing sign-off (PrimeTime) and physical verification flows (DRC/LVS). - Prior involvement in full-chip EMIR sign-off on production tape-outs.Job Titles This Role May Align With- EM / IR Drop Engineer - Power Integrity Engineer - Sign-off Engineer – EMIR - VLSI Reliability Engineer - Physical Sign-off Engineer