Job Title

Hi All,Greetings fromEximietas Design...!We are hiringSenior Physical Verification Professionals – Full Chipto join our growing semiconductor teams across India and the USA.Position Senior Physical Verification Professionals – Full ChipExperience 8 to 30+ YearsLocations India:Bengaluru, Hyderabad, Pune & Ahmedabad USA:San Jose (Bay Area), Austin Eligibility (USA):U.S. Permanent Residents (Green Card holders)Job Overview We are looking for highly experienced Physical Verification professionals with strong full-chip expertise and deep understanding of advanced technology nodes.Key Requirements: Excellent understanding of Physical Verification flow with hands-on experience in debuggingDRC, ERC, LVS, DFM, Antenna, PERC(primarily using Calibre). Strong experience in SoC/Full-chip and/or block-level PV. Exposure to advanced nodes such as3nm / 5nm / 7nm / 14nm / 20nmat major foundries. Experience in supporting large PV teams and coordinating cross-functional efforts. Hands-on experience in: Full-chip RDL power generation at top level Bump planning & IO RDL routing LVS debugging at chip-level with complex analog/mixed-signal IPs Low-power implementation (level shifters, isolation cells, power domains/islands, substrate isolation) Padring, corner pads, seal ring, DCM, RDL routing, bumps, and other full-chip components Strong understanding ofERC, PERC & ESD rules(added advantage). Experience with PnR tools ( ICC2 / Innovus ) for physical convergence.EDA Tools: Mentor (Calibre) Synopsys (ICV, ICC2) Cadence (Innovus)Qualifications Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, or related field (Master’s preferred).If this opportunity interests you—or if you know someone suitable—please share your updated resume at: are highly appreciated.Best regards, Maruthy Prasaad Associate VLSI Manager – Talent Acquisition | Visakhapatnam Eximietas Design +91 8088969910