Role-RTL Design (RTL Integration) Location- Bangalore Exp- 8 to 12 years JD SoC level RTL integration for the final netlist release of SoC. Netlist quality checks such as Lint, CDC, and RDC. Static checks and Constraints validation/management at SoC to Block level through Spyglass and Fishtail. Identifying timing exceptions and resolving all those for overall design convergence effort. Integrating and validating various high speed IPs integration at SoC level Experience on CPU and XPU is desirable.
Job Title
RTL Design (RTL Integration)