Job Title

Experience: 14 – 26 YearsLocation: Bangalore – IBC Knowledge Park, Bannerghatta RoadNotice Period: Strictly 30 Days or LessRole SummaryWe are hiring a Senior ASIC / RTL Design Leader to establish and lead an Offshore Development Center (ODC) for a strategic AI semiconductor client engagement aligned to high-performance AI accelerator programs (similar to Mythic type projects).This role requires a strong mix of hands-on technical depth, delivery leadership, customer handling, and team scaling capability.Key ResponsibilitiesSet up and scale ASIC/RTL ODC in BangaloreOwn end-to-end RTL design delivery for AI SoC programsLead microarchitecture definition and RTL implementationDrive IP/SoC integration, quality checks (Lint, CDC, LEC, Synthesis, Low Power)Own PPA trade-offs and ensure tape-out readinessAct as primary technical interface to customerManage cross-functional collaboration (Architecture, Verification, PD, DFT, Software)Plan and manage team capacity, hiring, mentoring, and performanceRequired Experience & Skills14–26 years in ASIC / SoC designStrong microarchitecture & RTL design expertiseExpert in Verilog/SystemVerilogHands-on experience with Synopsys DC / Cadence Genus, Spyglass, Conformal LECExperience in AI accelerator / high-performance compute / DSP / NOC / memory subsystemsStrong understanding of low power (UPF/CPF), timing closure, and advanced nodesProven experience in ODC setup or large offshore delivery ownershipStrong customer-facing and stakeholder management skillsIdeal Candidate ProfileHands-on technical leader (not purely managerial)Experience handling global semiconductor clientsStrong execution mindset with delivery accountabilityAble to scale teams (5–20+ engineers) and drive quality culture