Skip to Main Content

Job Title


Principal C Hardware Modeling Engineer (Floating-Point & Quantization)


Company : Tsavorite Scalable Intelligence


Location : Bangalore, Karnataka


Created : 2026-03-07


Job Type : Full Time


Job Description

Principal C++ Hardware Modeling Engineer (Floating-Point & Quantization)BangaloreFounded in 2023,by Industry veterans HQ in California,US Location: Greater Bengaluru Area Company DescriptionWe are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI.Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.Job TitlePrincipal C++ Hardware Modeling Engineer (Floating-Point & Quantization) [Experience Level 10+]Job SummaryWe are seeking a highly skilled C++ Hardware Modeling Engineer with deep expertise in floating-point representations, quantization, and microscaling techniques, and a strong background in VLSI hardware design verification. The ideal candidate will develop bit-accurate and cycle-aware C++ models that align closely with RTL implementations, enabling early architecture validation, functional verification, and performance analysis for advanced compute systems such as CPUs, NPUs, and AI accelerators.This role requires close collaboration with architecture, RTL design, and verification teams to ensure numerical correctness, precision trade-offs, and robust model-to-RTL correlation.Key ResponsibilitiesPrincipal C++ Hardware Model DevelopmentDevelop and maintain bit-accurate and cycle-approximate C++ models of hardware blocks involving floating-point, fixed-point, and quantized arithmeticImplement configurable precision models supporting FP16, BF16, FP32, FP64, FP8, INT8/INT4, and custom numeric formatsModel arithmetic pipelines including FMA, accumulation, normalization, and roundingEnsure C++ model behavior matches RTL semantics, including corner cases and exception handlingDesign and model microscaling / block floating-point (BFP) mechanisms and exponent-sharing schemesAnalyze numerical behavior Perform accuracy vs performance trade-off analysis for reduced-precision and quantized designsSupport validation of AI/ML workloads using reduced precision arithmeticContact:UdayMulya Technologies/"Mining The Knowledge Community/"