Job Title

Hi,We have an opening for RISC V/ARM Verification engineer and Lead role with SV, UVM, Verilog.Should have hands on verification experience on processor based system, preferably RISC-V/ARM based verification experience.Understanding of RISC-V/ARM architectureMust have worked on multiple project on SV-UVM based methodologyScripting experience is an added advantageStrong analytical and problem solving skillsUnderstanding of FPGA flow is an added advantagePlease share your resume to Regards,Jaya