Job Title

DIGITAL DESIGN ENGINEER (SENIOR PRINCIPAL / PRINCIPAL) Location: Greater Bengaluru AreaCompany DescriptionWe are a NASDAQ-listed organization providing rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, we enable organizations to unlock the full potential of modern AI. Our Intelligent Connectivity Platform integrates CXL®, Ethernet, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. Job DescriptionWe are seeking a Principal Digital Design Engineer with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in developing cutting-edge connectivity solutions.Key Responsibilities● Design and implement high-performance digital solutions, including RTL development and synthesis.● Collaborate with cross-functional teams on IP integration for processor IPs and peripherals.● Deep knowledge of processor boot process and peripheral implementation with boot firmware in mind.● Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤ 16nm.● Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon debug.● Utilize tools from Synopsys/Cadence and apply expertise in UVM-based verification flowsBasic Qualifications● Bachelor’s in Electronics/Electrical Engineering (Master's preferred).● 10–20 years of digital design experience, with 4+ years focused on processor, peripherals, and full-chip implementation.● Proven expertise in RTL development, synthesis, and timing closure.● Experience with front-end design, gate-level simulations, and design verification.● Strong work ethic, ability to handle multiple tasks, and proactive, customer-focused attitude.Required Expertise● Hands-on experience with processor IP (ARM/ARC).● Hands-on pre-silicon and post-silicon implementation of peripherals for I2C/SPI/UART.● Hands-on experience with complex DMA engines and firmware interaction.● Strong proficiency in SystemVerilog/Verilog and scripting (Python/Perl).● Experience with block-level and full-chip design at advanced nodes (≤16nm).● Silicon bring-up and post-silicon debug experience.● Familiarity with Synopsys/Cadence tools and UVM-based design verification.Preferred Experience● Knowledge of secure boot and security mechanisms like authentication and attestation.● Experience in system-level design with ARM/ARC/RISC-V processor subsystems.● Understanding of PAD design, DFT, and floor planning.● Experience with NIC, switch, or storage product development.● Familiarity with CI/CD design and verification workflows.