Company DescriptionPradhi Semiconductor Private Limited is a stealth-mode, Indian fabless semiconductor company focused on developing a product line and ecosystem for RISC-V SoC products. Role DescriptionThis is a full-time on-site role for a Principal Design Engineer, located in Hyderabad. Our SoC Engineering division is seeking a Principal Design Engineer to join 5G MPU product development team. As we continue to grow, we need talented engineers responsible for the development of products across Enterprise markets Qualifications Play a key role in the development of digital IP micro-architecture and design in 5G wireless APUs Be responsible for all aspects of digital IC design, from platform architecture to RTL design and verification Crafting design micro-architecture specifications, developing RTL, fixing bugs, performing design checks and generating of implementation constraints. Reconfigurable IP / Subsystem design; Power, Reset and Clock domain crossing; Static design checks like linting, CDC/RDC, RTL+UPF, X-propagation Drive micro-architecture definition, specifications, and RTL design reviews. Provide hands-on technical guidance in RTL design, design partitioning, clock/power domains, resets, and interface specification. Own RTL quality metrics (lint, CDC, RDC, synthesis QoR, timing closure readiness). Build and drive RTL schedules, milestones, and delivery checkpoints. Own RTL sign-off criteria and ensure design readiness for downstream verification, emulation, and physical design. Lead integration of third-party IPs (PCIe, HBM/DDR, NoC, security, compute cores, interconnect fabric). Work with cross functional teams: DV, Arch, PD, compiler and SW/FW teams. Establish digital design methodologies to ensure product quality and project execution Providing technical direction, mentoring, and leadership Your ProfileYou are best equipped for this task if you have: A degree in Electrical Engineering, Computer Science or similar technical field Minimum 10 years of experience in digital IC design Proven ability to contribute/lead successful products to high volume production Experience building SoCs with embedded cores (e.g., RISC-V, ARM, Tensilica, CEVA). Experience with DSP or implementation of digital control algorithms is a plus Experience with microcontroller and microprocessor-based designs. Expert understanding of computer architecture, SoC components, RTL Design, and Sub 10nm designs. Hands-on expertise with Verilog based RTL coding and microarchitecture, especially around integrating 3rd party I/Ps such as interfaces, Security, Boot, SRAM, DMA controllers, NOC, and processor I/Ps. Solid understanding in timing, pipelining, and microarchitecture. Should have solid understanding of industry standard tool and flows for RTL design. Experience with ARM-based or RISC-V processors, IP and bus architectures is a plus. Understanding of SoC protocols including AXI/CHI/CXS.B/CXL/PCIE/UA-Link Very good understanding of synthesis, timing closure, DFT flow (SCAN/IDDQ/MBIST), physical design Perl, Python or other scripting language Strong communication skills and ability to establish lasting relationships and networks Experience working with remote IC design/layout teams across different time zones in a collaborative environment You enjoy developing your leadership skills and working on your team’s development If interested, please email your resume to
Job Title
Principal Design Engineer