Job Title

About the RoleWe are looking for a skilled Design Verification Engineer to join our team and work on next-generation semiconductor designs. You will be responsible for verifying complex System-on-Chip (SoC) architectures to ensure high-quality, reliable silicon.Key Responsibilities3 - 7 years of experience in Design VerificationDevelop and execute verification plans for SoC/IP level designsBuild and maintain testbenches using System Verilog/UVMWrite test cases, sequences, and assertions to validate functionalityPerform functional, regression, and coverage-driven verificationDebug failures and work closely with design teams to resolve issuesAnalyze coverage metrics and improve test qualityParticipate in reviews of design and verification environmentsRequired SkillsStrong experience in System Verilog and UVM (Universal Verification Methodology)Good understanding of SoC architecture and digital design conceptsExperience with simulation tools (e.g., Synopsys VCS, Cadence Xcelium)Knowledge of debugging using waveforms and logsFamiliarity with protocols like AMBA (AXI, AHB, APB)Scripting knowledge (Python/Perl/Shell) is a plusPreferred QualificationsExperience with low-power verificationExposure to formal verification toolsUnderstanding of embedded systems or firmware interaction