Job Title

This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market. Its silicon engineering drives solutions that deliver high performance, energy efficiency, and intelligent integration, complemented by a key role in advancing modern telecommunications through next-generation wireless connectivity technologies. Its solutions are integrated into billions of devices worldwide, offering an ideal professional environment for talent seeking technological impact, innovation, and growth within a global context.The candidate will work closely with the San Diego DTech (Design Technology) methodology team. The candidate will help to develop static timing analysis and power/timing optimization methodologies, will work with vendors such as Synopsys and Cadence to define and validate new tool features, and will support design teams in the use of these methodologies and features.The ideal candidate will be familiar with: Static timing analysis tools and concepts, including tools such as PrimeTime, PrimeClosure, and Tempus.Physical design tools such as Innovus and Fusion Compiler.Physical design implementation, analysis, and optimization methodologies.Scripting languages including Python and TCL.Software architecture concepts related to tool and flow development.Excellent communication and analytical skills. The ideal candidate will have a Masters Degree or higher in electrical or computer engineering and 2+ years of experience in a related field.