Job Title

Company Overview Flux Computing designs and manufactures optical processors to train and run inference on large AI models.You could be just the right applicant for this job Read all associated information and make sure to apply.Join us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.The role Were searching for a Digital Design Engineer who is passionate about building and verifying complex, highperformance ASICs .You will own the definition and execution of verification strategies for the digital subsystems that control, configure and monitor Fluxs optical datapaths and AI compute fabrics.Your work will ensure firstsilicon success and robust, productionworthy silicon that scales to datacentre volumes.Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog UVM, assertionbased and formal) for datapath, control, memory and highspeed I/O blocks in our OTPU.Define verification plans that target functional correctness, lowpower modes, safety, reliability and security requirements; derive and track coverage metrics to closure.Develop reusable VIP and stimulus generators for modules such as networkonchip routers, DDR/LPDDR controllers, PCIe/CXL interfaces and proprietary photonic control logic.Collaborate closely with RTL designers to iterate on microarchitectures, resolve cornercase bugs and balance PPA (power, performance, area) tradeoffs uncovered during verification.Drive RTL quality GDS signoff: run lint, CDC/RDC, SDC constraint validation, gatelevel simulations, GLS with SDF, and poweraware checks; work with physicaldesign teams on ECOs.Enable postsilicon bringup by generating test vectors, configuring scan/DFT hooks, and supporting FPGA/emulation platforms for firmware and software teams.Mentor junior engineers on verification methodology, code reviews, and best practices; champion continuousintegration flows, regressions and results dashboards.Track industry advances in formal verification, emulation, coveragedriven flows, RISCV vectors, and AIcentric design techniques to keep Flux at the forefront of silicon quality.Skills & Experience 7 years in digital ASIC/SoC design & verification, with at least two tapeouts.Mastery of SystemVerilog/UVM, functional coverage, constraintrandom stimulus and scoreboards.Deep understanding of clockdomain crossing, reset and powerdomain management, DFT/scan and lowpower (UPF/CPF) methodologies.Strong scripting (Python, Tcl, shell) to automate regressions and data analysis.Proven debug skills across RTL, gatelevel and emulation environments.Compensation & Benefits Competitive salary and stock options in a rapidly growing AI company.Based in our new 5,000 sq.ft.office in the AI hub of Kings Cross, London.To foster collaboration in our high-growth environment, we require all employees to work from our London HQ and live within a 45-minute commute.We offer an extra 24,000/year incentive for those living within 20 minutes.Comprehensive healthcare insurance.25 days PTO policy plus bank holidays.Private access to our in-house 3D printer.If you are passionate about pushing the boundaries of what's possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you.Apply now to join Flux and be a key player in shaping the future of computing.