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Job Title: Senior Hardware Verification EngineerLocation: England, United Kingdom (Remote anywhere inside the country)About the Role: We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutionsResponsibilities​:Collaborate with design and architecture teams to create test plans for highly configurable IPs meant to provide interconnectivity between components across an SOC, chiplet or multi chiplet systemsWrite UVM/SystemVerilog code to implement the test plan, checkers and scoreboardsCollaborate with software teams to define and implement configurable testbenchesWork with design and DV engineers to implement the test plan, debug failures, close coverage, etc.Qualifications:BS/MS in Electrical Engineering, Computer Engineering or Computer Science8+ years and current hands-on experience in block-level/IP-level/SOC-level verificationProficiency in Verilog, SystemVerilogFamiliarity with industry-standard EDA tools for simulation and debugDeep experience with UVM-based testbenchesExperience with modern programming languages like PythonKnowledge of ARM AMBA protocols such as AXI, APB, and AHBUnderstanding of ARM CHI protocol is a plusExperience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NOCsExperience with formal verification techniques, emulation platforms is a plusExcellent problem-solving skills and attention to detailStrong communication and collaboration skillsrich.goldstein@