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Job Title


Design Verification Engineer


Company : IC Resources


Location : doncaster, yorkshire and the humber


Created : 2026-01-11


Job Type : Full Time


Job Description

Design Verification EngineerLocation: London HQ | Fully remote within the UK (quarterly visits) Salary: Up to £80,000 baseI’m currently recruiting for a Design Verification Engineer on behalf of a leading managed service provider that is partnering with a global semiconductor powerhouse to build and expand a UK-based chip development team. This is an excellent opportunity to join a rapidly growing UK operation while working on technically challenging, large-scale ASIC/SoC projects, alongside well-established global engineering teams.The role is fully remote within the UK, with quarterly visits to the London headquarters. There are multiple opportunities available as the team continues to scale.Role OverviewYou’ll be responsible for ensuring the functional correctness, performance, and specification compliance of complex digital ASIC core and IP designs. The role focuses on deep unit- and core-level verification.Key ResponsibilitiesDevelop comprehensive core verification plans based on micro-architecture and design specifications.Architect and implement robust, reusable verification environments using SystemVerilog and UVM.Create and execute constrained-random and directed tests to achieve high levels of functional and code coverage.Analyse simulation results, debug complex failures, and work closely with RTL design teams to root-cause and resolve issues.Develop and maintain Python and Perl scripts to improve verification flows and regression management.RequirementsStrong SystemVerilog/UVM expertise (essential).Solid understanding of digital logic design and verification methodologies.Experience verifying digital systems using standard IP components and interconnects.Project experience within the ARM ecosystem, including:Cortex-M7, CoreSight, NIC, and other AMBA-based interconnectsFamiliarity with AMBA protocols and SoC system debug infrastructureStrong experience with micro-architecture, Verilog/SystemVerilog, synthesis, timing constraint development, lint, and CDC checks.Experience with scripting (Python and/or Perl).Eligibility & PackageUK residency is required; relocation is not supported and only UK-based candidates can be considered.Visa sponsorship is available, where applicable.Base salary up to £80,000, dependent on experience, plus standard benefits.